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Research field 02

Reconfigurable Systems

What should reconfigurable hardware look like when the workload, technology, and operating conditions can all change?

Abstract FPGA fabric with heterogeneous tiles and copper and cyan reconfigurable routes.

Reconfigurable computing offers a productive middle ground between fixed-function efficiency and software flexibility. My research spans arithmetic operators, accelerator architectures, dynamic partial reconfiguration, and the underlying fabric itself.

Application-specific fabrics

Architectures and switch structures tuned to the compute and routing patterns of target workloads.

FPGA accelerators

Resource-efficient implementations for AI, reinforcement learning, spiking networks, and edge processing.

Dynamic adaptation

Partitioning, lifetime awareness, and design automation for partially reconfigurable systems.

Selected work in this field.

Browse all publications ↗
[ICCAD '26]

Navya Agarwal, Moritz Brunion, Dawit Abdi, Chang Gao and Siva Satyendra Sahoo, SHiFT: Enabling Switch Heterogeneity in Technology-aware FPGA Fabric Optimization. Accepted for ICCAD 2026.

[FPT '26]

Navya Agarwal, Moritz Brunion, Dawit Abdi, Chang Gao and Siva Satyendra Sahoo, FASTER: Fabric Analysis of Semiconductor Technology Scaling Effects for Reconfigurable System Evaluation under GAA and CFET Nodes. Accepted as a poster for FPT 2026.

[ASAP '25]

Lai, Xunqin, Federico Corradi and Siva Satyendra Sahoo. SpiRec: Soft-Logic Architecture Exploration of Reconfigurable Systems for Spiking Neural Networks. 2025 IEEE 36th International Conference on Application-specific Systems, Architectures and Processors (ASAP ’25): 109-116.

[IEEE TCAS-I '24]

Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattachrjee, and Akash Kumar. 2024. AxOCS: Scaling FPGA-Based Approximate Operators Using Configuration Supersampling. IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2024.3385333.

[ACM TRETS '24]

Siva Satyendra Sahoo, Salim Ullah, and Akash Kumar. 2024. AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming. ACM Trans. Reconfigurable Technol. Syst. 17, 2, Article 31 (June 2024), 28 pages. https://doi.org/10.1145/3648694

[ACM TECS '23]

Siva Satyendra Sahoo, Salim Ullah, and Akash Kumar. 2023. AxOTreeS: A Tree Search Approach to Synthesizing FPGA-based Approximate Operators. ACM Trans. Embed. Comput. Syst. 22, 5s, Article 101 (October 2023), 26 pages. https://doi.org/10.1145/3609096.

[Integration '18]

Sahoo, S. S., Nguyen, T. D. A., Veeravalli, B., & Kumar, A, Multi-objective design space exploration for system partitioning of FPGA-based Dynamic Partially Reconfigurable Systems, In Integration, the VLSI Journal, Elsevier, November 2018.

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