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Research record

Publications

Peer-reviewed work across emerging computing, reconfigurable systems, technology-aware architecture, dependable systems, and AI-enabled design automation.

15

Peer-reviewed journals

28

Conference proceedings

4

Book chapters

All publications

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[J15]

Salim Ullah, Siva Satyendra Sahoo, and Akash Kumar, AxO-ReQ: Redundancy-Aware Approximate Multipliers for Reliable Quantized Neural Acceleration, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Accepted for CASES (ESWeek) 2026.

2026
[J14]

Ali Asghar, Shahzad Bangash, Suleman Shah, Laiq Hasan, Salim Ullah, Siva Satyendra Sahoo, and Akash Kumar, EMGAxO: Extending Machine Learning Hardware Generators With Approximate Operators, in IEEE Embedded Systems Letters, vol. 17, no. 5, pp. 345-348, Oct. 2025, doi: 10.1109/LES.2025.3600043.

2025
[J13]

Sudipta Das, Bhawana Kumari, Siva Satyendra Sahoo, Yukai Chen, James Myers, Dragomir Milojevic, Dwaipayan Biswas, and Julien Ryckaert. Toward Fine-Grained Partitioning of Low-Level SRAM Caches for Emerging 3D-IC Designs, in IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, vol. 10, pp. 67-74, 2024, doi: 10.1109/JXCDC.2024.3468386.

2024
[J12]

Salim Ullah, Sahoo, Siva Satyendra, and Akash Kumar. AxOSpike: Spiking Neural Networks-driven Approximate Operator Design. in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 43, no. 11, pp. 3324-3335, Nov. 2024, doi: 10.1109/TCAD.2024.3443000.

2024
[J11]

Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattachrjee, and Akash Kumar. 2024. AxOCS: Scaling FPGA-Based Approximate Operators Using Configuration Supersampling. IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2024.3385333.

2024
[J10]

Siva Satyendra Sahoo, Salim Ullah, and Akash Kumar. 2024. AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming. ACM Trans. Reconfigurable Technol. Syst. 17, 2, Article 31 (June 2024), 28 pages. https://doi.org/10.1145/3648694

2024
[J9]

Siva Satyendra Sahoo, Salim Ullah, and Akash Kumar. 2023. AxOTreeS: A Tree Search Approach to Synthesizing FPGA-based Approximate Operators. ACM Trans. Embed. Comput. Syst. 22, 5s, Article 101 (October 2023), 26 pages. https://doi.org/10.1145/3609096.

2023
[J8]

Y. Zhao, S. Ullah, S. S. Sahoo and A. Kumar, NvMISC: Toward an FPGA-Based Emulation Platform for RISC-V and Nonvolatile Memories, in IEEE Embedded Systems Letters, vol. 15, no. 4, pp. 170-173, Dec. 2023, doi: 10.1109/LES.2023.3299202.

2023
[J7]

S. Ullah, S. S. Sahoo, N. Ahmed, D. Chaudhury, & A. Kumar. AppAxO: Designing Application-specific Approximate Operators for FPGA-based Embedded Systems, in ACM Trans. Embed. Comput. Syst. 21, 3, Article 29 (May 2022), 31 pages. https://doi.org/10.1145/3513262.

2022
[J6]

B. Ranjbar, A. Hosseinghorban, S. S. Sahoo, A. Ejlali & A. Kumar. BOT-MICS: Bounding Time Using Analytics in Mixed-Criticality Systems, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi: 10.1109/TCAD.2021.3127867.

2022
[J5]

S. S. Sahoo, Ranjbar, B., & Kumar, A, Reliability-aware Resource Management in Multi-/Many-core Systems: A Perspective Paper, in MDPI Journal of Low Power Electronics and Applications, 2021.

2021
[J4]

Nambi, S., Ullah, S., Lohana, A., S. S. Sahoo, Merchant, F., & Kumar, A, ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-based Edge Processing. in IEEE Access, vol. 9, pp. 103691-103708, 2021, doi: 10.1109/ACCESS.2021.3098730.

2021
[J3]

A. R. Baranwal, S. Ullah, S. S. Sahoo & A. Kumar, ReLAccS: A Multi-level Approach to Accelerator Design for Reinforcement Learning on FPGA-based Systems, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi: 10.1109/TCAD.2020.3028350.

2020
[J2]

S. Ullah, H. Schmidl, S. S. Sahoo, S. Rehman & A. Kumar, Area-optimized Accurate and Approximate Softcore Signed Multiplier Architectures, in IEEE Transactions on Computers, doi: 10.1109/TC.2020.2988404.

2020
[J1]

Sahoo, S. S., Nguyen, T. D. A., Veeravalli, B., & Kumar, A, Multi-objective design space exploration for system partitioning of FPGA-based Dynamic Partially Reconfigurable Systems, In Integration, the VLSI Journal, Elsevier, November 2018.

2018