Generative design
Models that synthesize promising operators and architectures while respecting hardware constraints.
Research field 05
How can AI become a trustworthy collaborator for hardware architects and EDA researchers?

Perspective
I use machine learning where it can expose structure in large design spaces: generating candidate circuits, learning surrogate models, guiding search, and balancing multiple objectives. The aim is not automation for its own sake, but faster and more explainable engineering insight.
Models that synthesize promising operators and architectures while respecting hardware constraints.
Tree search, constrained decoding, and learning-guided exploration across discrete design choices.
Fast prediction and relationship-aware reasoning for chiplets, reliability, and multi-objective trade-offs.
Relevant publications
Yi-Cheng Lo and Siva Satyendra Sahoo, ChiSER: Surrogate-Enhanced Resource-aware Exploration of Chiplet-based Deep Neural Network Accelerators, in Proceedings of the 63rd ACM/IEEE Design Automation Conference (DAC '26), Long Beach, CA, USA, July 26-29, 2026, doi: 10.1145/3770743.3803969.
[DAC '26]Behnaz Ranjbar, Siva Satyendra Sahoo, Rohit Yalavarthy and Akash Kumar, XRel-Graph: Graph Learning-Driven Cross-Layer Reliability Management in Embedded Mixed-Criticality Systems, Accepted for DAC 2026.
[IEEE ESL '25]Ali Asghar, Shahzad Bangash, Suleman Shah, Laiq Hasan, Salim Ullah, Siva Satyendra Sahoo, and Akash Kumar, EMGAxO: Extending Machine Learning Hardware Generators With Approximate Operators, in IEEE Embedded Systems Letters, vol. 17, no. 5, pp. 345-348, Oct. 2025, doi: 10.1109/LES.2025.3600043.
[ACM TRETS '24]Siva Satyendra Sahoo, Salim Ullah, and Akash Kumar. 2024. AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming. ACM Trans. Reconfigurable Technol. Syst. 17, 2, Article 31 (June 2024), 28 pages. https://doi.org/10.1145/3648694
[ACM TECS '23]Siva Satyendra Sahoo, Salim Ullah, and Akash Kumar. 2023. AxOTreeS: A Tree Search Approach to Synthesizing FPGA-based Approximate Operators. ACM Trans. Embed. Comput. Syst. 22, 5s, Article 101 (October 2023), 26 pages. https://doi.org/10.1145/3609096.
R. Ranjan, S. Ullah, S. S. Sahoo and A. Kumar, SyFAxO-GeN: Synthesizing FPGA-based Approximate Operators with Generative Networks, 2023 28th Asia and South Pacific Design Automation Conference (ASP-DAC ’23), Tokyo, Japan, 2023, pp. 402-409.
Sahoo, Siva Satyendra, Salim Ullah, and Akash Kumar. AxOSyn: An Open-source Framework for Synthesizing Novel Approximate Arithmetic Operators. ArXiv abs/2507.20007 (2025)